Aveek Sarkar Vice President Product Engineering -Books Pdf

Aveek Sarkar Vice President Product Engineering
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Stacked die design multi physics challenges, Power and noise modeling. Concurrent and model based approaches, Thermal modeling. Impact on power reliability and timing, Ongoing work. 2 2011 Apache Design Inc , Stacked Die Design Needs. Multi physics challenges , Electrical thermal and mechanical .
aware design interplay, Cross domain organization . Simulation Goals, Exploration and planning, Analysis optimization and. 3 2011 Apache Design Inc , Simulation Needs for Stacked Die Designs. Voltage Drop and Power Noise Impact, Top die experience additional voltage drop and coupled noise. from lower die or interposer in the stack up, Presence of TSV farm and associated metal via affect the.
homogeneity of power delivery network PDN for the bottom die. Thermal Impact, Thermal profile due to combined power and thermal signature. from shared micro bump connections, Significant impact to power leakage reliability EM and. timing hold ,4 2011 Apache Design Inc , Simulation Approaches for Stacked Die Designs. Power Model based, Compact IP protection, Simplified and open format. Concurrent, Simultaneous analysis, ESD Multiple layout result display.
5 2011 Apache Design Inc , Model Requirements for Stacked Die Analysis. Contain self consistent electrical data Die 1 Die 2. Enable seamless connections to other, Interposer, models or to chip interposer layout. Be in open standard format Package, Simplified topology to enable analysis. Power estimation, Power noise DC and time domain Die 1 Die 2. Model Layout, Impedance analysis frequency DC , Interposer Layout.
Reliability analysis EM ESD , Similar or integrated model for thermal Package netlist. RLCK S parameter , Contain technology design parameters. 6 2011 Apache Design Inc , Model Based Stacked Die Analysis. Self Consistency of Model, Full layout based analysis Model based analysis. e g CPM , e g using RedHawkTM e g using Spice, Resource Sarkar System level power distribution noise closure .
Looking beyond the SoC power integrity challenge DAC 2010 . 7 2011 Apache Design Inc , Model Based Stacked Die Analysis. Open Interface Protocols, Die 1 Die 2, S P Model Layout. uC RAM, DMA Interposer Layout, DSP ASIC Package netlist. RLCK S parameter , Streamlined import and hookup, Define model creation options. static dynamic VCD V less , Define content for stacked die.
power analysis estimation drop ,8 2011 Apache Design Inc . Case Studies of Stacked Die Design Analysis, Concurrent setup . Model based setup , Resource Singh et al Design and optimization of a power delivery network. for 3D stacked die designs DesignCon 2011 , 9 2011 Apache Design Inc . Case Studies of Stacked Die Design Analysis, Concurrent analysis Voltage drop on both die .
concurrent versus, model based, Resource Singh et al Design and optimization of a power delivery. network for 3D stacked die designs DesignCon 2011 . 10 2011 Apache Design Inc , Case Studies of Stacked Die Design Analysis. Resource Doyen et al Analysis of Power Delivery Network of Multiple Stacked. ASICs using TSV and Micro bumps DAC 2010 ,11 2011 Apache Design Inc . Model Based Thermal Analysis, IC Designers Designers. IC DESIGN Design, CTM P Thermal, Generation CTM Analysis.
SentinelTM TI, RedHawk Thermal Profile, Thermal Model. CTM Chip Thermal Model 3D Temp Profile Thermal Model. Temperature dependent library layer by layer JA JB JC Delphi. of power maps for each chip, IC Designers System Designers. Power EM Analysis Cooling System Design,12 2011 Apache Design Inc . Case Study Model Based Thermal Analysis, Thermal hot spot in the Thermal hot spot in the. bottom die on the lower right top die on the lower. corner aligned with power right corner due to heat. density hot spot sharing from uBumps ,13 2011 Apache Design Inc .
Re cap and Summary, Stacked die analysis presents several multi physics. Good models are necessary to bridge design and, organization silos. Apache is working on several areas , Stacked die power noise simulation. Stacked die thermal and mechanical stress modeling. Reliability and timing analysis, Working with Si2 on Open3D initiative.

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