A Biophysically Based Neuromorphic Model Of Spike Rate-Books Pdf

A biophysically based neuromorphic model of spike rate
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ities are critical for many real time portable implantable neural with wide input dynamic range to overcome device mismatch in. computing applications such as neuroprosthesis brain machine subthreshold circuits 44 are configured to emulate fast AMPA. interface neurorobotics neuromimetic computation machine and slower NMDA channels as described previously 53 The. learning or neural inspired adaptive control 44 However most output currents are sent to a membrane node circuit that keeps. such neuromorphic models emulate the temporally asymmetric the membrane potential V MEM near the resting potential V REST. STDP characteristic by direct phenomenological curve fitting in the absence of stimulation Fig 1B In response to a single. 45 instead of biophysical modeling 26 It has been suggested presynaptic stimulation excitatory I AMPA and I NMDA impinge. that nonmechanistic phenomenological modeling of STDP may on the membrane capacitor CMEM causing V MEM to generate. lead to many predictive failures especially when applied to other an excitatory postsynaptic potential EPSP that relaxes towards. forms of synaptic plasticity 25 To our knowledge none of the V REST at a rate determined by the membrane time constant. phenomenological neuromorphic STDP devices developed so far MEM CMEM gleak Fig 1C Importantly several discrete AMPA. can reproduce the SRDP learning rule hence they are inflexible channels carry excitatory postsynaptic current EPSC in parallel. in responding to rate based stimuli and each channel is gated by a binary control variable Cn where. Another limitation of previous neuromorphic synaptic plasti n 1 2 N that determines whether a particular AMPA chan. city models is the difficulty of long term analog storage of sy nel is active Thus the number of active AMPA channels encodes. naptic weights using electrical capacitors 32 46 which are the synaptic weight. volatile and bulky to implement on CMOS Although compact NMDA channels gated by both presynaptic glutamate and. nonvolatile long term memory of synaptic weights can potentially postsynaptic V MEM control over extracellular magnesium block. be achieved by using digital random access memories 41 or have slower dynamics and encode coincident pre and postsy. advanced floating gate 47 48 or memristor technologies 49 naptic activities by I NMDA amplitude Calcium influx via I NMDA. these devices are not readily amenable to the biophysical model generated as its own current I Ca 2 is integrated on a current. ing of NMDAR mediated plasticity in a Hebbian synapse voltage converter circuit to generate intracellular calcium. Here we propose an iono neuromorphic i e biophysically. Ca 2 i signal Fig 1C The calcium signal in turn activates. grounded CMOS circuit implementation of Hebbian synaptic. downstream circuits that adjust the number of active AMPA. ENGINEERING, plasticity that is capable of capturing both the NMDAR depen. channels Cn vector according to a learning rule implemented. dent SRDP and STDP learning rules Our iono neuromorphic. by Ca 2 i dependent plasticity circuits, model is based on the hypothesis that retrograde endocannabi. The iono neuromorphic synapse design is biologically intuitive. noid signaling and presynaptic NMDAR may provide a second. and allows application of experimental manipulations to observe. coincidence detector of pre and postsynaptic activity in addition. emergent behaviors For example the model is capable of mod. to postsynaptic NMDAR 50 52 To emulate the underlying. biophysical mechanisms we employ a recently proposed wide dy ifying hippocampal silent synapses expressing only NMDA chan. namic range iono neuromorphic CMOS circuit design approach nels into expressing AMPA channels following an induction. NEUROSCIENCE, that allows robust modeling of all types of voltage dependent protocol 54 Additionally the circuits allow tremendous flexibil. or ligand gated ion channel and intracellular ionic dynamics ity in emulating synapses from various brain structures by simply. on analog very large scale integrated aVLSI circuits 53 We tuning a small 1 4 set of parameters such as maximum conduc. show that our iono neuromorphic model readily reproduces LTP tance or activation dynamics of both excitatory and inhibitory. and LTD based on either the SRDP or STDP learning rules channels. implemented on the same CMOS chip The proposed iono neu. romorphic model of LTP and LTD lends itself readily to long Iono neuromorphic intracellular calcium mediated plasticity model. term storage of synaptic weights in a nonvolatile digital format Models of synaptic plasticity posit an important role of calcium. that is analogous to the discrete insertion and removal of AMPA in medicating downstream processing that results in expression of. or GABA receptor channels in real neurons thus circumventing potentiation or depression of the synaptic weight The learning. the limitations of analog memory rule implementation underlying on chip synaptic plasticity is. an adaptation of a biophysical model proposed by Shouval et al. Methods and Results 17 25 that relies on intracellular calcium dynamics to deter. Iono Neuromorphic Model of Postsynaptic NMDAR Dependent LTP mine synaptic plasticity The model computes the change in. and LTD Iono neuromorphic model of NMDA and AMPA channels synaptic weight dw by evaluating. A learning synapse circuit model of an excitatory postsynaptic. hippocampal dendritic spine compartment is designed as follows dw Ca Ca w 1. Fig 1A A set of CMOS building block circuits biased in the. subthreshold regime for robust iono neuromorphic modeling where w is the present synaptic weight Ca is the calcium. Downloaded by guest on September 19 2020, Fig 1 A Simple synapse consisting of AMPA and NMDA channels and calcium B Circuit models of individual elements of the synapse color coded with A. C Circuit outputs in response to a presynaptic action potential AP input APPRE See also Fig S1. Rachmuth et al PNAS December 6 2011 vol 108 no 49 E1267. dependent update rule Ca is a monotonically increasing enabling discrete AMPA channel circuits to fully turn on or off. supralinear function of Ca 2 i that controls the learning rate we converted the circuit into a calcium dependent digital. and is a forgetting constant that assures that the synaptic Enable signal This approach allows the neromorphic synapse. weight reverses back from saturation if it is not maintained at to modify its synaptic weight only during induction protocols that. its potentiated or depressed levels generate calcium influx that accumulates above a putative enable. The function employs LTP and LTD thresholds values LTP threshold The circuit employs a transconductance circuit. and LTD respectively to set potentiation and depression levels with a calcium dependent bias current I BIAS Ca which results. as a function of Ca 2 i By simply changing the LTP and LTD in different charging rates based on a dynamic calcium level. thresholds several plasticity vs Ca 2 i rules can be realized Fig 2C and superlinear behavior of the function. For our purposes we implemented the SRDP learning rule that The circuit generates an output current I proportional to the. has been observed experimentally in visual cortex and in hippo difference of Ca 2 i and a rest voltage REST whenever Ca 2 i. campus 55 56 The rule postulates that for LTD Ca 2 i V REST I is converted to a voltage signal V via a capacitor assur. LTP the synaptic strength will depress when Ca 2 i LTP ing monotonically increasing output as a function of the induction. the synaptic strength potentiates It is important to note that this protocol A leak transistor is included to keep V near V REST for. rule was developed to explain SRDP results which involve long quiescent activity V is sent to a pulse generator circuit that. trains of stimulation that generate a constant Ca 2 i level for a compares V to the enable threshold The circuit resets itself. relatively long period of time This assumption is not true for whenever it goes HI generating an Enable pulse and resets for. STDP protocols a period of time t a time period that is not predictable due. The and functions are expressed mathematically using to the subthreshold biasing The circuit therefore signals that. exponential functions making them simple to implement using an induction protocol has generated enough calcium to enable. subthreshold biased transistors Thus it is practical to use aVLSI the synapse to update its synaptic weight Fig 2D Because dur. technology to incorporate the learning rule into a large number of ing an induction protocol Ca 2 i V REST for a period of time. synapses The circuit computes an output signal I as a func V can generate several Enable pulses during the induction pro. tion of Ca 2 i signal from the calcium circuit Fig 2A The tocol allowing the synapse to update dynamically and then finally. circuit is split into LTP and LTD sections A cascade of differen locking in a value when the Ca 2 i falls below V REST. tial pair circuits compare Ca 2 i and a threshold either LTP or This property is inherent in the model suggesting that up. LTD and compute the output current for each section These dating the synaptic weight is strongly dependent on the exact. output currents are subtracted from each other and the resultant dynamics of the synaptic expression mechanism In our circuits. current is added to the na ve synaptic weight represented by. the expression dynamics are a function of Ca 2 i according to. I CONS The circuit can be tuned to generate various Hebbian. learning rules as seen in the hippocampus Fig 2B or anti Heb Ceta. bian learning rules observed in the cerebellum 57 Importantly update 2. LTP and LTD may be modified dynamically via an internal circuit I Ca2. to implement meta plasticity 58 allowing synaptic plasticity. over longer time scales in an unsupervised manner where Ceta is the capacitor of the circuit and is a threshold. The circuit is designed to mimic the calcium dependent voltage of the comparator This equation suggests that induction. learning rate irrespective of the direction of plasticity This circuit protocols must endure at least update seconds for the synaptic. captures the fact that while both LTD and LTP can be induced weight to update in an unsupervised manner To simulate SRDT. using a 900 pulse train longer stimulation trains are needed to we set to a level that requires calcium levels to remain elevated. generate LTD 15 min at 1 Hz stimulation compared to for at least several seconds or minutes before the Enable signal is. LTP 9 s at 100 Hz Because we update the synaptic weight with generated in order to reproduce experimental results 8. Downloaded by guest on September 19 2020, Fig 2 A circuit Input Ca 2 i signal used to compute output current I B I Ca 2 i curve parameterized by LTP and LTD C circuit Input Ca 2 i is used.
to both set the WR TCA maximum current and as an input The integrated V is sent to a comparator that generates a digital pulse when V D circuit. output in response to Ca 2 i transient, E1268 www pnas org cgi doi 10 1073 pnas 1106161108 Rachmuth et al. Digital storage of synaptic weights for LTP and LTD In our model tify the role of NMDAR mediated calcium influx on synaptic. synaptic weights are encoded iono neuromorphically by a dis plasticity Similar to experimental protocols V MEM was voltage. crete set of digitally gated AMPA channels controlled by Cn clamped at V REST and the synaptic reversal potential ESYN 70. the updated synaptic strength If Cn is HI LO the nth AMPA and 0 mV respectively while presynaptic stimulation was applied. conductance is activated deactivated and the synaptic weight is at a rate of 1 Hz The results reveal differences in I NMDA I Ca 2. potentiated depressed compared to its previous state To con and Ca 2 accumulation depending on the clamping voltage. vert from an analog and to a digital vector Cn we set 1 Fig 3A Because I NMDA consists of Ca and Na ions its reversal. digitized I using a picoampere A D converter 59 60 and potential is 0 mV Therefore when V MEM is clamped at ESYN. paired the Enable signal from the circuit to update a W circuit I NMDA is near 0 However I CA which has its own reversal poten. e g dw from Eq 1 following a particular induction protocol tial ECa 140 mV is substantially larger When V MEM ESYN. The W circuit updates the weight in two steps First an asyn. repeated stimulations resulted in elevated Ca 2 i level above. chronous digital finite state machine FSM see Fig S1. LTP for a period longer than update and eventually resulted in. Table S1 for details uses the digitized signal D to compute. future weight vector Cn which are mapped to the inputs of dedi potentiation Fig 3B. cated D flipflop DFF circuits that control individual AMPA We next tested SRDP induction protocols aimed at showing. channels This vector then waits for an Enable square pulse NMDA channel activity as a Hebbian coincidence detector of. command from the digitized V which causes the Cn vector to pre and postsynaptic activity and its control of synaptic plasticity. update the synaptic weight and resets V back to zero SRDP protocols assume that the mean AP firing rate is the main. The FSM provides a convenient abstraction of multiple non information transfer mode in neural networks and so employ. linear and interacting cellular and molecular mechanisms trains of stimulations We used a standard protocol of 900 pulses. thought to be activated by postsynaptic Ca 2 signal to drive sy at several presynaptic firing rates ranging from low to high. A biophysically based neuromorphic model of spike rate and timing dependent plasticity Guy Rachmutha b Harel Z Shouvalc Mark F Beard and Chi Sang Poona 1 aHarvard MIT Division of Health Sciences and Technology Massachusetts Institute of Technology Cambridge MA 02139 bDivision of Engineering and Applied Sciences Harvard University Cambridge MA 02138 cDepartment of Neurobiology and

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